drm/i915/psr: Move writing early transport pipe src
authorJouni Högander <jouni.hogander@intel.com>
Tue, 19 Mar 2024 12:33:24 +0000 (14:33 +0200)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 3 Apr 2024 18:26:10 +0000 (14:26 -0400)
commit4e29234353a4378a49e5ee6f5683678d7e101e17
treea8c4429e22c62a29a1c35c09e33254b33c516020
parent64d845f651267deb62bcf013ce37e2360161fdf1
drm/i915/psr: Move writing early transport pipe src

Currently PIPE_SRCSZ_ERLY_TPT is written in
intel_display.c:intel_set_pipe_src_size. This doesn't work as
intel_set_pipe_src_size is called only on modeset.

Bspec: 68927

Fixes: 3291bbb93e16 ("drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2 early transport")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-3-jouni.hogander@intel.com
(cherry picked from commit b52c4093b0c9089b00b42823d41986a94d32e341)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_psr.c