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pinctrl: intel: Add Intel Merrifield pin controller support
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 23 Jun 2016 10:49:36 +0000 (13:49 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 29 Jun 2016 07:59:35 +0000 (09:59 +0200)
commit4e80c8f505741cbdef3e10862ea36057e8d85e7c
tree0be7bbd8d0782de936659baab556ef7b53ce4494tree | snapshot
parent11884b18ef0642e08f8a413e55c11d1cd6c62feecommit | diff
pinctrl: intel: Add Intel Merrifield pin controller support

This driver adds pinctrl support for Intel Merrifield. The IP block which is
called Family-Level Interface Shim is a separate entity in SoC. The GPIO driver
(gpio-intel-mid.c) will be updated accordingly to support pinctrl interface.

Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/intel/Kconfig diff | blob | history
drivers/pinctrl/intel/Makefile diff | blob | history
drivers/pinctrl/intel/pinctrl-merrifield.c [new file with mode: 0644] blob
ep93xx device tree rework repo: git://git.maquefel.me/linux.git