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target/arm/translate-a64: Don't underdecode add/sub extended register
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 1 Feb 2019 14:55:44 +0000 (14:55 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 1 Feb 2019 14:55:44 +0000 (14:55 +0000)
commit4f61106614410945b1d1c93081544ad5b13044fc
tree63f7cbd9211381fea1971911c025316361f83241tree | snapshot
parent9c72b68ad746a51f63822cffab4d144b5957823acommit | diff
target/arm/translate-a64: Don't underdecode add/sub extended register

In the "add/subtract (extended register)" encoding group, the "opt"
field in bits [23:22] must be zero. Correctly UNDEF the unallocated
encodings where this field is not zero.

Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 20190125182626.9221-6-peter.maydell@linaro.org
target/arm/translate-a64.c diff | blob | history
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