drm/amd/display: Correct I2C register offset
authorChris Park <chris.park@amd.com>
Tue, 23 Aug 2022 16:21:52 +0000 (12:21 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Sep 2022 18:32:59 +0000 (14:32 -0400)
commit4f76da231826190658d19ec8d89ea8cd46fdfb7d
tree6bac7d9300a3d1d67925d73163c295a6310b9aaf
parent17529ea2acfa3e2118f5a9ee911e0daf2d88c13f
drm/amd/display: Correct I2C register offset

[Why]
I2C register name starts with 1, unlike other registers that start with
0. This creates a problem with the new register macro refactoring when
I2C HW objects are created in an array.

[How]
Correct I2C register offset by making a new macro to account for array
offset.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.h
drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c