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clk: qcom: Fix MSM8998 resets
authorJeffrey Hugo <jhugo@codeaurora.org>
Mon, 3 Dec 2018 16:13:43 +0000 (09:13 -0700)
committerStephen Boyd <sboyd@kernel.org>
Mon, 3 Dec 2018 17:57:28 +0000 (09:57 -0800)
commit4f89f7b59a6ea17e81cff212c18a0b580ff5ff27
treeb2856361a79a8d98eb0bc00bc6f58309bfe83cb8tree | snapshot
parent651022382c7f8da46cb4872a545ee1da6d097d2acommit | diff
clk: qcom: Fix MSM8998 resets

The offsets for the defined BCR reset registers does not match the hardware
documentation.  Update the values to match the hardware documentation.

Fixes: b5f5f525c547 (clk: qcom: Add MSM8998 Global Clock Control (GCC) driver)
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/qcom/gcc-msm8998.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git