PCI: Access Link 2 registers only for devices with Links
authorMaciej W. Rozycki <macro@orcam.me.uk>
Sat, 17 Sep 2022 12:03:09 +0000 (13:03 +0100)
committerBjorn Helgaas <bhelgaas@google.com>
Fri, 4 Nov 2022 15:38:11 +0000 (10:38 -0500)
commit503fa23614dc95f96af883a8e2e873d5c6cd53d8
treedb370093acfd139e5bdb9cdaa188bffb936ad8d7
parent9abf2313adc1ca1b6180c508c25f22f9395cc780
PCI: Access Link 2 registers only for devices with Links

PCIe r2.0, sec 7.8 added Link Capabilities/Status/Control 2 registers to
the PCIe Capability with Capability Version 2.

Previously we assumed these registers were implemented for all PCIe
Capabilities of version 2 or greater, but in fact they are only
implemented for devices with Links.

Update pcie_capability_reg_implemented() to check whether the device has
a Link.

[bhelgaas: commit log, squash export]
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2209100057070.2275@angie.orcam.me.uk
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2209100057300.2275@angie.orcam.me.uk
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/access.c
drivers/pci/pci.h