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(parent: fb1f70f) | patch
tcg/riscv: Add the tcg target registers
authorAlistair Francis <Alistair.Francis@wdc.com>
Wed, 19 Dec 2018 19:17:20 +0000 (19:17 +0000)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 25 Dec 2018 19:40:02 +0000 (06:40 +1100)
commit505e75c592825e3a8fed38af252fa4425e2c2b09
tree9f7a5bcf08389a3775c9e4b47aca53c3fa7015d8tree | snapshot
parentfb1f70f3685bae613d91626578bce96590ed2cb7commit | diff
tcg/riscv: Add the tcg target registers

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <6e43abaa64361d57b9bc9439820d0e7701f2d47e.1545246859.git.alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
tcg/riscv/tcg-target.inc.c [new file with mode: 0644] blob
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