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target/arm: Improve vector REV
authorRichard Henderson <richard.henderson@linaro.org>
Sun, 13 Jun 2021 23:18:51 +0000 (16:18 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 29 Jun 2021 17:04:57 +0000 (10:04 -0700)
commit50a7470e3e9de7fda510acd02880f85ad6d5afd5
tree6186c5d6c84efbf30659d1d96880261d18a579e2tree | snapshot
parent2b0a39e51e64ae501192b18233bddcc81c098312commit | diff
target/arm: Improve vector REV

We can eliminate the requirement for a zero-extended output,
because the following store will ignore any garbage high bits.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/arm/translate-a64.c diff | blob | history
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