drm/xe/gsc: add HECI2 register offsets
authorVitaly Lubart <vitaly.lubart@intel.com>
Mon, 28 Aug 2023 10:07:07 +0000 (13:07 +0300)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:42:59 +0000 (11:42 -0500)
commit5120243bfb0dabc9f16924a5fc66e8ef26f0f8d3
tree0a22d4ac82c5ad980ef41c0bdde704c1e1059f5f
parentcd0adf746527dc2d1410adf5bf09ee6f4cd22a79
drm/xe/gsc: add HECI2 register offsets

Add HECI2 register offsets for DG1 and DG2 to regs/xe_regs.h

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/regs/xe_regs.h