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MIPS: Loongson64: Bump ISA level to MIPSR2
authorJiaxun Yang <jiaxun.yang@flygoat.com>
Mon, 13 Jan 2020 10:15:00 +0000 (18:15 +0800)
committerPaul Burton <paulburton@kernel.org>
Thu, 23 Jan 2020 18:26:48 +0000 (10:26 -0800)
commit51522217f65f1f937f421d9f417cf0e714ef3c02
tree29384efccae4de2d23e641f8d07ef16273acecaetree | snapshot
parentba9196d2e005a07dc616a044a57b47665efe133dcommit | diff
MIPS: Loongson64: Bump ISA level to MIPSR2

Despite early sample of Loongson-3A1000, the whole Loongson64 family have
implemented all the features required by MIPS64 Release2. Thus we decide to
bump the ISA option to R2.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com
Cc: paul.burton@mips.com
Cc: linux-kernel@vger.kernel.org
arch/mips/Kconfig diff | blob | history
arch/mips/include/asm/hazards.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git