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clk: renesas: r9a08g045: Add clock and reset support for ETH0 and ETH1
authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Thu, 7 Dec 2023 07:06:51 +0000 (09:06 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 13 Dec 2023 19:05:55 +0000 (20:05 +0100)
commit515f05da372aedf347a1ac99d17fb832ba371d4d
treeb63cab6d9da22659ccf29316430c413c150710f6tree | snapshot
parentda235d2fac212d0add570e755feb1167a830bc99commit | diff
clk: renesas: r9a08g045: Add clock and reset support for ETH0 and ETH1

RZ/G3S has 2 Gigabit Ethernet interfaces available.  Add clock and reset
support for both of them.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231207070700.4156557-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a08g045-cpg.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git