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(parent: ca6b5fe) | patch
mmc: sdhci-pci-o2micro: Fix SDR50 mode timing issue
authorFred <fred.ai@bayhubtech.com>
Thu, 23 Feb 2023 12:04:50 +0000 (20:04 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Thu, 23 Mar 2023 10:30:20 +0000 (11:30 +0100)
commit51dfc6142acecfea9bf2041ccadbc3438e31af56
treebc3e15412aa9829cb05f988e072ebd2d04f277e5tree | snapshot
parentca6b5fe277e91ebca5101dc00c0e26755f0ed6c4commit | diff
mmc: sdhci-pci-o2micro: Fix SDR50 mode timing issue

Change SDR50 mode clock source from DLL output clock to PLL open clock
1.HS200 and SDR104 mode select DLL output clock
2.SDR50 mode select PLL open clock

Signed-off-by: Fred <fred.ai@bayhubtech.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230223120450.16858-1-fredaibayhubtech@126.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-pci-o2micro.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git