arm64: dts: ti: j7200-main: Mark Main NAVSS as dma-coherent
authorVignesh Raghavendra <vigneshr@ti.com>
Mon, 10 May 2021 18:06:01 +0000 (23:36 +0530)
committerNishanth Menon <nm@ti.com>
Fri, 14 May 2021 17:47:09 +0000 (12:47 -0500)
commit52ae30f55a2a40cff549fac95de82f25403bd387
tree7d94a45d8627dfb7638aced8866a52cef572974d
parentdf61cd9393845383adc4ea2410f2a91e1d1972b6
arm64: dts: ti: j7200-main: Mark Main NAVSS as dma-coherent

Traffic through main NAVSS interconnect is coherent wrt ARM caches on
J7200 SoC.  Add missing dma-coherent property to main_navss node.

Also add dma-ranges to be consistent with mcu_navss node
and with AM65/J721e main_navss and mcu_navss nodes.

Fixes: d361ed88455fe ("arm64: dts: ti: Add support for J7200 SoC")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210510180601.19458-1-vigneshr@ti.com
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi