RISC-V: Add hooks to use the gdb xml files.
authorJim Wilson <jimw@sifive.com>
Fri, 15 Mar 2019 10:26:59 +0000 (03:26 -0700)
committerPalmer Dabbelt <palmer@sifive.com>
Tue, 19 Mar 2019 12:13:24 +0000 (05:13 -0700)
commit5371f5cd7170f29310575977f89e6e35d4d65168
treea280c7f86b3384f0590559191800771a898c8400
parent753e3fe207db08ce0ef0405e8452c3397c9b9308
RISC-V: Add hooks to use the gdb xml files.

The gdb CSR xml file has registers in documentation order, not numerical
order, so we need a table to map the register numbers.  This also adds
fairly standard gdb hooks to access xml specified registers.

notice:
    The fpu xml from gdb 8.3 has unused register #, 65 and make first
    csr register # become 69. We register extra register on gdb to correct
    csr offset calculation

Signed-off-by: Jim Wilson <jimw@sifive.com>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/gdbstub.c