mtd: spi-nor: micron-st: enable die erase for multi die flashes
authorTudor Ambarus <tudor.ambarus@linaro.org>
Sat, 25 Nov 2023 12:35:27 +0000 (14:35 +0200)
committerTudor Ambarus <tudor.ambarus@linaro.org>
Wed, 6 Dec 2023 09:25:07 +0000 (11:25 +0200)
commit53919a968b43648822f2d35b6cafacd3950238cc
tree9e5d91da194fb15932c55cc1e26c002eb3b6c611
parent461d0babb54462188c98818b472e6a3d5a91fd60
mtd: spi-nor: micron-st: enable die erase for multi die flashes

Enable die erase for multi die flashes, it will speed the erase time.

Unfortunately, Micron does not provide a 4-byte opcode equivalent for
the die erase. The SFDP 4BAIT table fails to consider the die erase too,
the standard can be improved. Thus we're forced to enter in the 4 byte
address mode in order to benefit of the die erase.

Tested on n25q00. This flash defines the 4BAIT SFDP table, thus it will
use the 4BAIT opcodes for reads, page programs or erases, with the
exception that it will use the die erase command in the 4 byte address
mode.

Link: https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_1gb_3v_65nm.pdf?rev=b6eba74759984f749f8c039bc5bc47b7
Link: https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_l_02g_cbb_0.pdf?rev=43f7f66fc8da4d7d901b35fa51284c8f
Link: https://lore.kernel.org/r/20231125123529.55686-4-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
drivers/mtd/spi-nor/core.c
drivers/mtd/spi-nor/micron-st.c