phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits
authorSebastian Reichel <sebastian.reichel@collabora.com>
Thu, 4 Apr 2024 17:11:27 +0000 (19:11 +0200)
committerVinod Koul <vkoul@kernel.org>
Sat, 6 Apr 2024 09:01:13 +0000 (14:31 +0530)
commit55491a5fa163bf15158f34f3650b3985f25622b9
treebd3a7c9739237acad3f890377fb3be8db5e91178
parentf8020dfb311d2b6cf657668792aaa5fa8863a7dd
phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits

Currently the PCIe v3 PHY driver only sets the pcie1ln_sel bits, but
does not clear them because of an incorrect write mask. This fixes up
the issue by using a newly introduced constant for the write mask.

While at it also introduces a proper GENMASK based constant for the
PCIE30_PHY_MODE.

Fixes: 2e9bffc4f713 ("phy: rockchip: Support PCIe v3")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240404-rk3588-pcie-bifurcation-fixes-v1-2-9907136eeafd@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/rockchip/phy-rockchip-snps-pcie3.c