iio: adc: ad7298: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:55:52 +0000 (18:55 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:12 +0000 (11:53 +0100)
commit585c9772f883da3ac425e2e8277b2aaceb201f38
tree0949d9faf38d545002c7040edc50e0e77cd6a6d7
parent98295a206d04633bae31f279de11ff7d04724bce
iio: adc: ad7298: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: be7fd3b86ad2 ("iio:adc:ad7298 make the tx and rx buffers __be16")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-13-jic23@kernel.org
drivers/iio/adc/ad7298.c