clk: rockchip: fix I2S1 clock gate register for rk3328
authorKatsuhiro Suzuki <katsuhiro@katsuster.net>
Sun, 18 Nov 2018 04:16:12 +0000 (13:16 +0900)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 19 Nov 2018 13:39:29 +0000 (14:39 +0100)
commit5c73ac2f8b70834a603eb2d92eb0bb464634420b
treea78c64306bdf28fa1d3f7f7b50fb796be0cc0588
parent8989e9d2e6484fe2131dd16fa31698154affef40
clk: rockchip: fix I2S1 clock gate register for rk3328

This patch fixes definition of I2S1 clock gate register for rk3328.
Current setting is not related I2S clocks.
  - bit6 of CRU_CLKGATE_CON0 means clk_ddrmon_en
  - bit6 of CRU_CLKGATE_CON1 means clk_i2s1_en

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3328.c