RISC-V: Add FIRMWARE_READ_HI definition
authorAtish Patra <atishp@rivosinc.com>
Sat, 20 Apr 2024 15:17:18 +0000 (08:17 -0700)
committerAnup Patel <anup@brainfault.org>
Mon, 22 Apr 2024 05:43:44 +0000 (11:13 +0530)
commit5d4acb7f2e1af1a5160870dbd11d2bd3a86007ed
tree46f81525558551582ccfc7696eaf3e8ff7931939
parentd1927f64e0e1094f296842e127138cb5f3bf3c6d
RISC-V: Add FIRMWARE_READ_HI definition

SBI v2.0 added another function to SBI PMU extension to read
the upper bits of a counter with width larger than XLEN.

Add the definition for that function.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Clément Léger <cleger@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-3-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/sbi.h