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(parent: fe62bc2) | patch
x86/PCI: Add PIRQ routing table range checks
authorMaciej W. Rozycki <macro@orcam.me.uk>
Thu, 31 Mar 2022 07:10:55 +0000 (08:10 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Sun, 10 Apr 2022 10:48:14 +0000 (12:48 +0200)
commit5d64089aa4a5bd3d7e00e3d6ddf4943dd34627b3
treeffcd9ea8c06988ed4f87483e99a98f7c4a9a8a7ctree | snapshot
parentfe62bc23620fa027162e05594a610ff5e556496acommit | diff
x86/PCI: Add PIRQ routing table range checks

Verify that the PCI IRQ Routing Table header as well as individual slot
entries are all wholly contained within the BIOS memory area.  Do not
even call the checksum calculator if the header would overrun the area
and then bail out early if any slot would.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2203301735510.22465@angie.orcam.me.uk
arch/x86/pci/irq.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git