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riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macro
authorFrederik Haxel <haxel@fzi.de>
Tue, 12 Dec 2023 13:01:13 +0000 (14:01 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 10 Jan 2024 03:33:21 +0000 (19:33 -0800)
commit5daa3726410288075ba73c336bb2e80d6b06aa4d
treea1451f18f991c636ba19215a0a5ae7c4c3da52e1tree | snapshot
parent66f1e68093979816a23412a3fad066f5bcbc0360commit | diff
riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macro

During the refactoring, a bug was introduced in the rarly used
XIP_FIXUP_FLASH_OFFSET macro.

Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
Fixes: e7681beba992 ("RISC-V: Split out the XIP fixups into their own file")
Signed-off-by: Frederik Haxel <haxel@fzi.de>
Link: https://lore.kernel.org/r/20231212130116.848530-3-haxel@fzi.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/xip_fixup.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git