i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14]
authorZhao Liu <zhao1.liu@intel.com>
Wed, 24 Apr 2024 15:49:29 +0000 (23:49 +0800)
committerPaolo Bonzini <pbonzini@redhat.com>
Wed, 22 May 2024 17:56:27 +0000 (19:56 +0200)
commit5eb608a13b2dfb772c831d02000a3514d1f137aa
treeba650dfc4c305e3dee236884f37c543a0fd02de6
parentf602eb925ac5d51d09de6c4b32ba8a5142055492
i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14]

CPUID[0x8000001D].EAX[bits 25:14] NumSharingCache: number of logical
processors sharing cache.

The number of logical processors sharing this cache is
NumSharingCache + 1.

After cache models have topology information, we can use
CPUCacheInfo.share_level to decide which topology level to be encoded
into CPUID[0x8000001D].EAX[bits 25:14].

Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Tested-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Babu Moger <babu.moger@amd.com>
Message-ID: <20240424154929.1487382-22-zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target/i386/cpu.c