pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs
authorDanila Tikhonov <danila@jiaxyga.com>
Tue, 23 Apr 2024 20:32:45 +0000 (23:32 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 3 May 2024 07:55:04 +0000 (09:55 +0200)
commit5ed79863fae5c06eb33f5cd6b6bdf22dd7089392
tree35cbd17c35ff6bed0bd4f7257082b267f5910d51
parent083f6675e194bca802c3121ccf59ca0a1cf81c09
pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs

SDC1 and UFS_RESET special pins are located in the west memory bank.

SDC1 have address 0x359a000:
0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9a000 (SDC1_OFFSET) = 0x359a000

UFS_RESET have address 0x359f000:
0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9f000 (UFS_OFFSET) = 0x359a000

Fixes: b915395c9e04 ("pinctrl: qcom: Add SM7150 pinctrl driver")
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Message-ID: <20240423203245.188480-1-danila@jiaxyga.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/qcom/pinctrl-sm7150.c