cxl/core: Rename bus.c to core.c
authorDan Williams <dan.j.williams@intel.com>
Fri, 14 May 2021 05:22:00 +0000 (22:22 -0700)
committerDan Williams <dan.j.williams@intel.com>
Fri, 14 May 2021 23:13:19 +0000 (16:13 -0700)
commit5f653f7590ab7db7379f668b2975744585206b0d
tree94a35fdd5f2d6c58594d24933b5cfa66523243d4
parent8ac75dd6ab3039ef0656d777a564ea1b65071971
cxl/core: Rename bus.c to core.c

In preparation for more generic shared functionality across endpoint
consumers of core cxl resources, and platform-firmware producers of
those resources, rename bus.c to core.c. In addition to the central
rendezvous for interleave coordination, the core will also define common
routines like CXL register block mapping.

Acked-by: Ben Widawsky <ben.widawsky@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/162096972018.1865304.11079951161445408423.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Documentation/driver-api/cxl/memory-devices.rst
drivers/cxl/Makefile
drivers/cxl/bus.c [deleted file]
drivers/cxl/core.c [new file with mode: 0644]