RISC-V: insn-def: Add I-type insn-def
authorAndrew Jones <ajones@ventanamicro.com>
Sun, 8 Jan 2023 16:33:54 +0000 (16:33 +0000)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 15 Feb 2023 05:29:51 +0000 (21:29 -0800)
commit6067c3aae52f14b025d0a4de5d4d1eb16eb8fe51
treeff9ac058c6ca1d8ad8f4bcbe84ae96702708fc45
parent1b929c02afd37871d5afb9d498426f83432e71c2
RISC-V: insn-def: Add I-type insn-def

CBO instructions use the I-type of instruction format where
the immediate is used to identify the CBO instruction type.
Add I-type instruction encoding support to insn-def.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20230108163356.3063839-2-conor@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/insn-def.h