drm/amd/display: fix incorrect mpc_combine array size
authorWenjing Liu <wenjing.liu@amd.com>
Thu, 18 Jan 2024 20:14:15 +0000 (15:14 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 29 Jan 2024 20:45:43 +0000 (15:45 -0500)
commit607e1b0cf480cb8dbd65b372397871d7389942b5
tree53771b8a25fcfb3e0f3c507717f17c9820fa5663
parente8d131285c98927554cd007f47cedc4694bfedde
drm/amd/display: fix incorrect mpc_combine array size

[why]
MAX_SURFACES is per stream, while MAX_PLANES is per asic. The
mpc_combine is an array that records all the planes per asic. Therefore
MAX_PLANES should be used as the array size. Using MAX_SURFACES causes
array overflow when there are more than 3 planes.

[how]
Use the MAX_PLANES for the mpc_combine array size.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com>
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c