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MIPS: lantiq: split up IRQ IM ranges
authorJohn Crispin <blogic@openwrt.org>
Thu, 16 Aug 2012 11:39:57 +0000 (11:39 +0000)
committerJohn Crispin <blogic@openwrt.org>
Wed, 22 Aug 2012 22:08:17 +0000 (00:08 +0200)
commit61fa969f27ec58296544bf94d058f3aa704cb8d9
treeb4c8597b9b6fc758be9a42f3940cec7b2893f888tree | snapshot
parentfea7a08acb13524b47711625eebea40a0ede69a0commit | diff
MIPS: lantiq: split up IRQ IM ranges

Up to now all our SoCs had the 5 IM ranges in a consecutive order. To accomodate
the SVIP we need to support IM ranges that are scattered inside the register range.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4237/
arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h diff | blob | history
arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h diff | blob | history
arch/mips/lantiq/irq.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git