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linux-user: Correct AUXV Cache Line Sizes for PowerPC
authorTom Musta <tommusta@gmail.com>
Mon, 16 Jun 2014 16:03:19 +0000 (11:03 -0500)
committerAlexander Graf <agraf@suse.de>
Fri, 27 Jun 2014 11:48:21 +0000 (13:48 +0200)
commit623e250abdca2c29830793e3ac81a9e405f33216
tree953162c9135dc0c65c72543e961ef880f50f63d8tree | snapshot
parentff4873cb8c81db89668d8b56e19e57b852edb5f5commit | diff
linux-user: Correct AUXV Cache Line Sizes for PowerPC

Set the AT_ICACHEBSIZE and AT_DCACHEBSIZE entries of the AUXV to match the
CPU model's cache line sizes.  This fixes memory clobbering problems on more
recent Book 3s implementations; memset(p, 0, N) will use the dcbz instruction
when N is sufficiently large and many of the newer server CPUs have cache lines
sizes of 128 bytes.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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