RISC-V: Use IPIs for remote icache flush when possible
authorAnup Patel <apatel@ventanamicro.com>
Tue, 28 Mar 2023 03:52:22 +0000 (09:22 +0530)
committerMarc Zyngier <maz@kernel.org>
Sat, 8 Apr 2023 10:26:24 +0000 (11:26 +0100)
commit6279228432352f43f43f5e760771151605bf6d82
treee8a3aef57fad6c5c9a98419754e1d300a183c3de
parent18d2199d81054f44e6d2a51177cc80566f43bf23
RISC-V: Use IPIs for remote icache flush when possible

If we have specialized interrupt controller (such as AIA IMSIC) which
allows supervisor mode to directly inject IPIs without any assistance
from M-mode or HS-mode then using such specialized interrupt controller,
we can do remote icache flushe directly from supervisor mode instead of
using the SBI RFENCE calls.

This patch extends remote icache flush functions to use supervisor mode
IPIs whenever direct supervisor mode IPIs.are supported by interrupt
controller.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230328035223.1480939-7-apatel@ventanamicro.com
arch/riscv/mm/cacheflush.c