drm/edid: Fix off-by-one in DispID DTD pixel clock
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 23 Apr 2020 15:17:43 +0000 (18:17 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 24 Apr 2020 13:37:03 +0000 (16:37 +0300)
commit6292b8efe32e6be408af364132f09572aed14382
tree4e3f13e4499a4cf764a8e6b5968f868830da0844
parent9da67433f64eb89e5a7b47977507806c6ea026e7
drm/edid: Fix off-by-one in DispID DTD pixel clock

The DispID DTD pixel clock is documented as:
"00 00 00 h → FF FF FF h | Pixel clock ÷ 10,000 0.01 → 167,772.16 Mega Pixels per Sec"
Which seems to imply that we to add one to the raw value.

Reality seems to agree as there are tiled displays in the wild
which currently show a 10kHz difference in the pixel clock
between the tiles (one tile gets its mode from the base EDID,
the other from the DispID block).

Cc: stable@vger.kernel.org
References: https://gitlab.freedesktop.org/drm/intel/-/issues/27
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200423151743.18767-1-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
drivers/gpu/drm/drm_edid.c