clk: mediatek: Change PLL register API for MT8186
authorJohnson Wang <johnson.wang@mediatek.com>
Mon, 21 Nov 2022 12:29:57 +0000 (20:29 +0800)
committerChen-Yu Tsai <wenst@chromium.org>
Tue, 29 Nov 2022 06:43:07 +0000 (14:43 +0800)
commit633e34d0f46ed36f1de15ede00e4b31f4d7cccae
tree4777fb34e31d2031aff442a3d6a6552fe928c24a
parentd7964de8a8ea800910fdd4e365c42a9e7d5c54aa
clk: mediatek: Change PLL register API for MT8186

Use mtk_clk_register_pllfhs() to enhance frequency hopping and
spread spectrum clocking control for MT8186.

Co-developed-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Signed-off-by: Johnson Wang <johnson.wang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221121122957.21611-5-johnson.wang@mediatek.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
drivers/clk/mediatek/Kconfig
drivers/clk/mediatek/clk-mt8186-apmixedsys.c