riscv: errata: Add StarFive JH7100 errata
authorEmil Renner Berthing <emil.renner.berthing@canonical.com>
Thu, 30 Nov 2023 15:19:25 +0000 (16:19 +0100)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 13 Dec 2023 15:41:59 +0000 (15:41 +0000)
commit64fc984a8a54163a5c44e15a54b574a2c5564d8f
tree6488ecea5965483871c4f25a654d19904e8fe0b5
parent0d5701dc9cd653ae757cc06e39b3a39272863395
riscv: errata: Add StarFive JH7100 errata

This not really an errata, but since the JH7100 was made before
the standard Zicbom extension it needs the DMA_GLOBAL_POOL and
RISCV_NONSTANDARD_CACHE_OPS enabled to work correctly.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/Kconfig.errata