clk: samsung: exynosautov9: add fsys1 clock support
authorChanho Park <chanho61.park@samsung.com>
Fri, 29 Jul 2022 00:30:24 +0000 (09:30 +0900)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 23 Aug 2022 06:21:57 +0000 (09:21 +0300)
commit65522e7d86c986df77bd3106de1ef7712070ee7e
tree95ed8cfd13924d176cea0102deff4d8ad716635a
parent3477b3c3a9fbb6422874c7f24a35249e1773c687
clk: samsung: exynosautov9: add fsys1 clock support

CMU_FSYS1 provides clocks for USB(2 x USB3.1 Gen-1, 2 x USB 2.0) and
mmc. For MMC clocks, PLL_MMC(PLL0831X type) is also supported as a PLL
source clock provider.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/d4aa967538fed9667e9550a256e545026fc2fa8d.1659054220.git.chanho61.park@samsung.com
drivers/clk/samsung/clk-exynosautov9.c