drm/msm/dp: DisplayPort PHY compliance tests fixup
authorTanmay Shah <tanmay@codeaurora.org>
Sat, 26 Sep 2020 04:50:48 +0000 (21:50 -0700)
committerRob Clark <robdclark@chromium.org>
Wed, 4 Nov 2020 16:26:25 +0000 (08:26 -0800)
commit6625e2637d93d2f52ef0d17656f21bfa2cb4983a
tree228c177671bd2a16534188cc1d1da2bd435c8477
parentc7314613226a05758bb8c5a350521959c7db4ea9
drm/msm/dp: DisplayPort PHY compliance tests fixup

Bandwidth code was being used as test link rate. Fix this by converting
bandwidth code to test link rate

Do not reset voltage and pre-emphasis level during IRQ HPD attention
interrupt. Also fix pre-emphasis parsing during test link status process

Signed-off-by: Tanmay Shah <tanmay@codeaurora.org>
Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on Snapdragon Chipsets")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/dp/dp_ctrl.c
drivers/gpu/drm/msm/dp/dp_display.c
drivers/gpu/drm/msm/dp/dp_link.c
drivers/gpu/drm/msm/dp/dp_link.h