ARC: mm: retire support for aliasing VIPT D$
authorVineet Gupta <vgupta@kernel.org>
Thu, 16 Feb 2023 05:06:33 +0000 (21:06 -0800)
committerVineet Gupta <vgupta@kernel.org>
Sat, 9 Dec 2023 00:30:24 +0000 (16:30 -0800)
commit6732c0e494ac35fbadd749bbbd226c0aceb2d2c4
treede0ec244bb228891a3cc139a3fb8abd97b96a3b1
parent3a02ec2f0b304af6b38e9cc5a009bf517d38e72c
ARC: mm: retire support for aliasing VIPT D$

Legacy ARC700 processors (first generation of MMU enabled ARC cores) had
VIPT cached which could be configured such that they could alias.
Corresponding support in kernel (with all the obnoxious cache flush overhead)
was added in ARC port 10 years ago to support 1 silicon. That is long bygone
and we can let it RIP.

Cc: Matthew Wilcox (Oracle) <willy@infradead.org>
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
arch/arc/Kconfig
arch/arc/include/asm/cacheflush.h
arch/arc/mm/cache.c
arch/arc/mm/mmap.c
arch/arc/mm/tlb.c