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arm64: dts: ti: k3-am625: Correct L2 cache size to 512KB
authorVignesh Raghavendra <vigneshr@ti.com>
Mon, 20 Mar 2023 04:49:34 +0000 (10:19 +0530)
committerNishanth Menon <nm@ti.com>
Mon, 20 Mar 2023 17:34:25 +0000 (12:34 -0500)
commit6974371cab1c488a53960945cb139b20ebb5f16b
treedd45411797f90c3f9f9674b25ef9095f1b4e17a4tree | snapshot
parent436b288687176bf4d2c1cd25b86173e5a1649a60commit | diff
arm64: dts: ti: k3-am625: Correct L2 cache size to 512KB

Per AM62x SoC datasheet[0] L2 cache is 512KB.

[0] https://www.ti.com/lit/gpn/am625 Page 1.

Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230320044935.2512288-1-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am625.dtsi diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git