hw/riscv/riscv-iommu: add ATS support
authorTomasz Jeznach <tjeznach@rivosinc.com>
Wed, 16 Oct 2024 20:40:33 +0000 (17:40 -0300)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 31 Oct 2024 03:51:24 +0000 (13:51 +1000)
commit69a9ae483696e185889edaeddacf46afd9110bc6
treec30f49b0d76606c15f86e0b80f4fad9db6d963b6
parent9d085a1c3cb2b6a1ee77d5f6e0ca20241208acd8
hw/riscv/riscv-iommu: add ATS support

Add PCIe Address Translation Services (ATS) capabilities to the IOMMU.
This will add support for ATS translation requests in Fault/Event
queues, Page-request queue and IOATC invalidations.

Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241016204038.649340-10-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/riscv-iommu-bits.h
hw/riscv/riscv-iommu.c
hw/riscv/riscv-iommu.h
hw/riscv/trace-events