target/arm: Add PSTATE.ALLINT
authorJinjie Ruan <ruanjinjie@huawei.com>
Fri, 19 Apr 2024 13:32:56 +0000 (14:32 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 25 Apr 2024 09:21:04 +0000 (10:21 +0100)
commit6aa20415613096034ac943872aebd49fbe48e2d0
treec1f8cc89e9637187c5fa0ba81cff90a71f97e54b
parent2b0d2ab895022814da13127e47c17890690488da
target/arm: Add PSTATE.ALLINT

When PSTATE.ALLINT is set, an IRQ or FIQ interrupt that is targeted to
ELx, with or without superpriority is masked. As Richard suggested, place
ALLINT bit in PSTATE in env->pstate.

In the pseudocode, AArch64.ExceptionReturn() calls SetPSTATEFromPSR(), which
treats PSTATE.ALLINT as one of the bits which are reinstated from SPSR to
PSTATE regardless of whether this is an illegal exception return or not. So
handle PSTATE.ALLINT the same way as PSTATE.DAIF in the illegal_return exit
path of the exception_return helper. With the change, exception entry and
return are automatically handled.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240407081733.3231820-3-ruanjinjie@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.h
target/arm/tcg/helper-a64.c