riscv: Include riscv_set_icache_flush_ctx prctl
authorCharlie Jenkins <charlie@rivosinc.com>
Tue, 12 Mar 2024 23:53:41 +0000 (16:53 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 18 Apr 2024 15:10:58 +0000 (08:10 -0700)
commit6b9391b581fddd8579239dad4de4f0393149e10a
treecc60083c637b481c0df1f5e8e426b05cf25b0534
parentbebc345413f5fb4c8fafb59ff0bd8509197627e6
riscv: Include riscv_set_icache_flush_ctx prctl

Support new prctl with key PR_RISCV_SET_ICACHE_FLUSH_CTX to enable
optimization of cross modifying code. This prctl enables userspace code
to use icache flushing instructions such as fence.i with the guarantee
that the icache will continue to be clean after thread migration.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Link: https://lore.kernel.org/r/20240312-fencei-v13-2-4b6bdc2bbf32@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/mmu.h
arch/riscv/include/asm/processor.h
arch/riscv/include/asm/switch_to.h
arch/riscv/mm/cacheflush.c
arch/riscv/mm/context.c
include/uapi/linux/prctl.h
kernel/sys.c