clk: renesas: r9a07g043: Add OSTM clock and reset entries
authorBiju Das <biju.das.jz@bp.renesas.com>
Mon, 25 Apr 2022 09:52:43 +0000 (10:52 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 28 Apr 2022 14:37:45 +0000 (16:37 +0200)
commit6c05648b57aba4c677eaf9c6c4c10bf4e713c1c0
tree66a0a65332f2ca36e3521d48243f21cba7163771
parent1cbda37757ab5581a18214b62e83a914acfcf3e8
clk: renesas: r9a07g043: Add OSTM clock and reset entries

Add OSTM{0,1,2} clock and reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425095244.156720-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g043-cpg.c