media: rkisp1: Fix endianness on raw streams on i.MX8MP
authorPaul Elder <paul.elder@ideasonboard.com>
Fri, 16 Feb 2024 09:54:57 +0000 (18:54 +0900)
committerLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Fri, 23 Feb 2024 12:23:32 +0000 (14:23 +0200)
commit6c144351f2366c590336cc6c23918e20c43ef938
treeca1c026b22ecead966f5b151fbf094a6fbc99f42
parent0a593f711ac7fb775ac132e9f5fea54ae2a0d85d
media: rkisp1: Fix endianness on raw streams on i.MX8MP

The i.MX8MP has extra register fields in the memory interface control
register for setting the output format, which work with the output
alignment format register for byte-swapping and LSB/MSB alignment.

With processed and 8-bit raw streams, it doesn't cause any problems to
not set these, but with raw streams of higher bit depth the endianness
is swapped and the data is not aligned properly.

Add support for setting these registers and plumb them in to fix this.

While at it, reflow a comment related to the forced configuration
update.

Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h