clk: jz4725b: fix mmc0 clock gating
authorSiarhei Volkau <lis8215@gmail.com>
Sat, 5 Feb 2022 17:18:49 +0000 (20:18 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 2 Mar 2022 10:47:48 +0000 (11:47 +0100)
commit6d20ff677349240313d9110fc8076a9d729fafbf
tree21387addc07e3f1e36060bc902685795ef8d93f2
parentb80fbc20f33489dd810edfc52343e3c0f4b2403a
clk: jz4725b: fix mmc0 clock gating

commit 2f0754f27a230fee6e6d753f07585cee03bedfe3 upstream.

The mmc0 clock gate bit was mistakenly assigned to "i2s" clock.
You can find that the same bit is assigned to "mmc0" too.
It leads to mmc0 hang for a long time after any sound activity
also it  prevented PM_SLEEP to work properly.
I guess it was introduced by copy-paste from jz4740 driver
where it is really controls I2S clock gate.

Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver")
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Tested-by: Siarhei Volkau <lis8215@gmail.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220205171849.687805-2-lis8215@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/clk/ingenic/jz4725b-cgu.c