RISC-V: fix single stepping over ret and other branching instructions
authorFabien Chouteau <chouteau@adacore.com>
Mon, 25 Mar 2019 11:45:54 +0000 (12:45 +0100)
committerPalmer Dabbelt <palmer@sifive.com>
Fri, 24 May 2019 19:09:22 +0000 (12:09 -0700)
commit6e2716d8ca4edf3597307accef7af36e8ad966eb
treef009cae605d716ba41226406841fb32b1768b3c2
parentb86f4167630802128d94f3c89043d97d2f4c2546
RISC-V: fix single stepping over ret and other branching instructions

This patch introduces wrappers around the tcg_gen_exit_tb() and
tcg_gen_lookup_and_goto_ptr() functions that handle single stepping,
i.e. call gen_exception_debug() when single stepping is enabled.

Theses functions are then used instead of the originals, bringing single
stepping handling in places where it was previously ignored such as jalr
and system branch instructions (ecall, mret, sret, etc.).

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
target/riscv/insn_trans/trans_privileged.inc.c
target/riscv/insn_trans/trans_rvi.inc.c
target/riscv/translate.c