dt-bindings: mailbox: fix the mpfs' reg property
authorConor Dooley <conor.dooley@microchip.com>
Wed, 24 Aug 2022 07:08:10 +0000 (08:08 +0100)
committerJassi Brar <jaswinder.singh@linaro.org>
Thu, 6 Oct 2022 02:48:25 +0000 (21:48 -0500)
commit6e2bdf7dc3c817dd91d84adb306a5dfab999c309
treea806f927da620b944cbba9e65c470e2d5f7ac87b
parent7e5cd064f73ccecd2ac1aadca078394bd25ea3ce
dt-bindings: mailbox: fix the mpfs' reg property

The "data" region of the PolarFire SoC's system controller mailbox is
not one continuous register space - the system controller's QSPI sits
between the control and data registers. Split the "data" reg into two
parts: "data" & "control".

Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles")
Fixes: ed9543d6f2c4 ("dt-bindings: add bindings for polarfire soc mailbox")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml