arm64: dts: qcom: sm8550: Mark DWC3 as dma-coherent
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Mon, 12 Feb 2024 13:10:14 +0000 (14:10 +0100)
committerBjorn Andersson <andersson@kernel.org>
Tue, 16 Apr 2024 01:54:03 +0000 (20:54 -0500)
commit6e4f7e53991ca7e70dc7d5d9d66c833091e1f6ae
treecc4226fa7791699f39e821fd95302c6e2b86f2b8
parentd18b5477dcea7775a562b3ba7aaa68772c8980ba
arm64: dts: qcom: sm8550: Mark DWC3 as dma-coherent

In a fairly new development, Qualcomm somehow made the DWC3 block
cache-coherent. Annotate that.

Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240210-topic-1v-v1-6-fda0db38e29b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm8550.dtsi