clk: renesas: r8a779h0: Add watchdog clock
authorCong Dang <cong.dang.xn@renesas.com>
Thu, 1 Feb 2024 12:21:55 +0000 (13:21 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 6 Feb 2024 10:20:02 +0000 (11:20 +0100)
commit6e8b1dcb0956668e77cc9177b810b7c1f15c6d8d
treea5d44a08cf0fba19089c3ed6826f76b4f82664bf
parent62527c9d46a151163525482301cf79fecd5402ef
clk: renesas: r8a779h0: Add watchdog clock

Add the module clock used by the RCLK Watchdog Timer on the Renesas
R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f1dbf0f3f484015f2e629d78b746cf377d6f6746.1706790015.git.geert+renesas@glider.be
drivers/clk/renesas/r8a779h0-cpg-mssr.c