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(parent: 3e0e16a) | patch
target/microblaze: Fix width of ESR
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 20 Aug 2020 05:37:40 +0000 (22:37 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 1 Sep 2020 14:41:38 +0000 (07:41 -0700)
commit6efd55995a224787baa712500b82ef21a148d38e
tree6d34b48064a7c5b6527062ac2725ca4185a34713tree | snapshot
parent3e0e16ae1e0048a21a91674061ec9c43c5d7a76ccommit | diff
target/microblaze: Fix width of ESR

The exception status register is only 32-bits wide.
Do not use a 64-bit type to represent it.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
linux-user/microblaze/cpu_loop.c diff | blob | history
target/microblaze/cpu.h diff | blob | history
target/microblaze/helper.c diff | blob | history
target/microblaze/op_helper.c diff | blob | history
target/microblaze/translate.c diff | blob | history
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