clk: qcom: cpu-8996: fix PLL configuration sequence
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 13 Jan 2023 12:05:40 +0000 (14:05 +0200)
committerBjorn Andersson <andersson@kernel.org>
Thu, 19 Jan 2023 04:50:01 +0000 (22:50 -0600)
commit6fb03dd0b40aa83a3a04390ef539f1547b77ca1d
treec89394e1ce6a7b7c8869a12d939c6a8e4979d6b8
parentfa0bc05f2f87eb84dba1977794048ee7b9ec6545
clk: qcom: cpu-8996: fix PLL configuration sequence

Switch both power and performance clocks to the GPLL0/2 (sys_apcs_aux)
before PLL configuration. Switch them to the ACD afterwards.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113120544.59320-11-dmitry.baryshkov@linaro.org
drivers/clk/qcom/clk-cpu-8996.c