ARM: dts: imx6qp-prtwd3: Fix the SPI chipselect polarity
authorFabio Estevam <festevam@gmail.com>
Fri, 16 Jul 2021 13:36:57 +0000 (10:36 -0300)
committerShawn Guo <shawnguo@kernel.org>
Wed, 22 Sep 2021 03:09:47 +0000 (11:09 +0800)
commit70b211ddcf9df5df288fcf648a032394cb3b84f0
tree9ac5a1e1d134c0534ee3e5f36f0be317d495a165
parent97eb19d884831c5b2ebe423cd54137ba9793ea6c
ARM: dts: imx6qp-prtwd3: Fix the SPI chipselect polarity

The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:

[    4.854337] m25p80@0 enforce active low on chipselect handle

Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.

The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:

* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.

To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6qp-prtwd3.dts