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(parent: d431abd) | patch
octeontx2-af: Update Tx link register range
authorRahul Bhansali <rbhansali@marvell.com>
Tue, 5 Dec 2023 08:04:34 +0000 (13:34 +0530)
committerPaolo Abeni <pabeni@redhat.com>
Wed, 6 Dec 2023 12:44:38 +0000 (13:44 +0100)
commit7336fc196748f82646b630d5a2e9d283e200b988
tree16bacf8945f91f9aa92ac06880c3151b958b636dtree | snapshot
parentd431abd0a9aa27be379fb5f8304062071b0f5a7ecommit | diff
octeontx2-af: Update Tx link register range

On new silicons the TX channels for transmit level has increased.
This patch fixes the respective register offset range to
configure the newly added channels.

Fixes: b279bbb3314e ("octeontx2-af: NIX Tx scheduler queue config support")
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git